Qwenputer: A RISC-V CPU Compiled Into the Weights of Qwen3.5
A developer has built a model in which a working RISC-V processor is embedded directly in the weights of a stock Qwen 3.5 4B. The model runs arithmetic and small programs without any external tools.
Source: Divyansh Agrawal
The project, called Qwenputer, takes an unmodified Qwen 3.5 4B and compiles a 32-bit RISC-V core into its weights. The processor uses the model's own Gated DeltaNet layers as working memory. Because no training is involved, a compiler sets the weights directly from a description of the CPU as a sequence of small steps. The processor runs as the model generates tokens, and it can execute arithmetic and C or MicroPython code without any external runtime or tool call.
The author reports benchmark results against the base model and against a version given a Python tool. On several DeepMind arithmetic sets, Qwenputer scores between 97.5% and 100%, while base Qwen scores as low as 55% on one of them. The author also says the CPU's printed outputs matched a reference machine across about 230,000 positions, with no mismatches. The project also adds an experimental in-model file storage system, which the author says keeps facts across conversations.
The work has clear limits. The checkpoint is 18.8 GB, roughly double the base model, and it needs a small driver called RvChat to boot the firmware. Each CPU instruction costs several tokens, so larger calculations take seconds. The author says the processor is not yet capable of running Linux, and that making it faster is a priority. The model, code, and a write-up are available on Hugging Face, ModelScope, and GitHub.
